Language
SystemVerilog
Hardware description and hardware verification language
2002Appeared
static typing, weak typingType system
Facts
- Appeared
- 2002
- Type system
- static typing, weak typing
- Kind
- hardware description language, hardware verification language
- Designed by
- Institute of Electrical and Electronics Engineers
- Influenced by
- VHDL, Verilog
- File extensions
- .sv .svr
- Influences listed
- 2
Sources: Wikidata (CC0) · Wikidata Q1387402